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specifications of any and all sanyo semiconductor co.,l td. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer ' s products or equipment. to verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer ' sproductsor equipment. any and all sanyo semiconductor co.,ltd. products described or contained herein are, with regard to "standard application", intended for the use as general el ectronics equipment (home appliances, av equipment, communication device, office equipment, industrial equ ipment etc.). the products mentioned herein shall not be intended for use for any "special application" (medica l equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, t ransportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of re liability and can directly threaten human lives in case of failure or malfunction of the product or may cause har m to human bodies, nor shall they grant any guarantee thereof. if you should intend to use our products for app lications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. if there is n o consultation or inquiry before the intended use, our customer shall be solely responsible for the use. 21809 ms / 11499rm(ki) no.5982-1/15 lb1847 overview the lb1847 is a driver ic for stepping motors with pwm current control bipolar drive (fixed off time). a special feature of this ic is that vref voltage is constant while the current can be set in 15 steps, allowing drive of motors ranging from 1-2 phase exciter types to 4w 1-2 phase exciter types. the current decay pattern can also be selected (slow decay, fast decay, mix decay) to increase the decay of regene rative current at chopping off, thereby improving response characteristics. this is especially useful for carriage and paper feed stepping motors in printers and similar applications where high-precision control and low vibrations are required. features ? pwm current control (fixed off time) ? load current digital selector (1-2, w1-2, 2w1-2, 4w1-2 phase exciter drive possible) ? selectable current decay pattern (s low decay, fast decay, mix decay) ? simultaneous on prevention function (feed-through current prevention) ? noise canceler ? built-in thermal shutdown circuit ? built-in logic low-voltage off circuit specifications absolute maximum ratings at ta = 25 c parameter symbol conditions ratings unit motor supply voltage v bb 50 v output peek current i o peak t w = 20 s 1.75 a output continuous current i o max 1.5 a logic supply voltage v cc 7.0 a logic input voltage range v in -0.3 to v cc v emitter output voltage v e 1.0 v independent ic 3.0 w allowable power dissipation pd max with infinitely large heat sink 20 w operating temperature topr -20 to +85 c storage temperature tstg -55 to +150 c monolithic digital ic pwm current control type stepping motor driver orderin g numbe r : en5982a
lb1847 no.5982-2/15 allowable operating ranges at ta = 25 c parameter symbol conditions ratings unit motor supply voltage range v bb 10 to 45 v logic supply voltage v cc 4.75 to 5.25 v reference voltage range v ref 0.0 to 3.0 v electrical characteristics at ta = 25 c, v bb = 45v, v cc = 5v, v ref = 1.52v ratings parameter symbol conditions min typ max unit output block i bb on 2.3 3.5 5.0 ma output stage supply voltage i bb off 0.5 0.8 1.1 ma v o (sat)1 i o = +1.0a, sink 1.2 1.6 v v o (sat)2 i o = +1.5a, sink 1.5 1.9 v v o (sat)3 i o = -1.0a, source 1.9 2.2 v output saturation voltage v o (sat)4 i o = -1.5a, source 2.2 2.4 v i o (leak)1 v o = v bb , sink 50 a output leak current i o (leak)2 v o = 0v, source -50 a output sustain voltage v sus l = 15mh, i o = 1.5a, guaranteed design value * 45 v logic block i cc on i 4 = 3.2v, i 3 = 3.2v, i 2 = 3.2v, i 1 = 3.2v 19.5 26 36.5 ma logic supply voltage i cc off enable = 3.2v 10.5 15 19.5 ma v ih 3.2 v input voltage v il 0.8 v i ih v ih = 3.2v 100 a input current i il v il = 0.8v -10 a i 4 = 3.2v, i 3 = 3.2v, i 2 = 3.2v, i 1 = 3.2v 0.470 0.50 0.525 v i 4 = 3.2v, i 3 = 3.2v, i 2 = 3.2v, i 1 = 0.8v 0.445 0.48 0.505 v i 4 = 3.2v, i 3 = 3.2v, i 2 = 0.8v, i 1 = 3.2v 0.425 0.46 0.485 v i 4 = 3.2v, i 3 = 3.2v, i 2 = 0.8v, i 1 = 0.8v 0.410 0.43 0.465 v i 4 = 3.2v, i 3 = 0.8v, i 2 = 3.2v, i 1 = 3.2v 0.385 0.41 0.435 v i 4 = 3.2v, i 3 = 0.8v, i 2 = 3.2v, i 1 = 0.8v 0.365 0.39 0.415 v i 4 = 3.2v, i 3 = 0.8v, i 2 = 0.8v, i 1 = 3.2v 0.345 0.37 0.385 v i 4 = 3.2v, i 3 = 0.8v, i 2 = 0.8v, i 1 = 0.8v 0.325 0.35 0.365 v i 4 = 0.8v, i 3 = 3.2v, i 2 = 3.2v, i 1 = 3.2v 0.280 0.30 0.325 v i 4 = 0.8v, i 3 = 3.2v, i 2 = 3.2v, i 1 = 0.8v 0.240 0.26 0.285 v i 4 = 0.8v, i 3 = 3.2v, i 2 = 0.8v, i 1 = 3.2v 0.195 0.22 0.235 v i 4 = 0.8v, i 3 = 3.2v, i 2 = 0.8v, i 1 = 0.8v 0.155 0.17 0.190 v i 4 = 0.8v, i 3 = 0.8v, i 2 = 3.2v, i 1 = 3.2v 0.115 0.13 0.145 v sensing voltage v e i 4 = 0.8v, i 3 = 0.8v, i 2 = 3.2v, i 1 = 0.8v 0.075 0.09 0.100 v reference current i ref v ref = 1.5v -0.5 a cr pin current i cr cr = 1.0v -4.6 -1.0 ma md pin current i md md = 1.0v, cr = 4.0v -5.0 a decay pin current low i decl v dec = 0.8v -10 a decay pin current high i dech v dec = 3.2v 5 a thermal shutdown temperature tsd 170 c logic on voltage l vsd 1 3.35 3.65 3.95 v logic off voltage l vsd 2 3.20 3.50 3.80 v lvsd hysteresis width ? l vsd 0.065 0.15 0.23 v
lb1847 no.5982-3/15 package dimensions unit : mm (typ) 3147c -20 0 20 40 60 80 100 0 25 20 15 10 5 pd max -- ta 3 1.56 10.4 85 ambient temperature, ta -- c allowable power dissipation, pd max -- w independent ic with infinitely large heat sink pin assignment top view 1 2 3 4 5 6 7 8 9 10 11 12 13 14 md v ref 1 cr1 e1 decay1 ouy a ouy a ouy b ouy b decay2 e2 cr2 v ref 2 v bb 28 27 26 25 24 23 22 21 20 19 18 17 16 15 v cc phase1 enable1 i a 1 i a 2 i a 3 i a 4 i b 4 i b 3 i b 2 i b 1 enable2 phase2 gnd lb1847 sanyo : dip28h(500mil) 1 14 28 15 0.4 0.6 4.0 4.0 26.75 20.0 r1.7 8.4 (1.81) 1.78 1.0 12.7 11.2
lb1847 no.5982-4/15 block diagram out a out a out b out b v bb md phase1 decay1 enable1 i a 1 i a 2 i a 3 i a 4 v ref 1 gnd phase2 decay2 enable2 i b 1 i b 2 i b 3 i b 4 v ref 2 v cc cr1 e1 cr2 e2 control logic circuit control logic circuit thermal shutdown circuit current selector circuit current selector circuit one-shot multi- blanking time one-shot multi- blanking time
lb1847 no.5982-5/15 pin function pin no. pin name function 1 md sets the off time for fast mode and slow mode in mix decay. setting input range: 4v to 1.5v. 2 13 v ref 1 v ref 2 output set current reference supply pin. setting voltage range: 0v to 3v. 3 12 cr1 cr2 output off time setting pin for switching operation. 4 11 e1 e2 pin for controlling the set current with sensing resistor re. 5 10 decay1 decay2 slow mode/fast mode selector pin. decay2 slow decay: h fast decay: l 6 7 8 9 out a out a out b out b output pin. 14 v bb output stage supply voltage pin. 15 gnd ground pin. 27 16 phase1 phase2 output phase selector input pin 26 17 enable1 enable2 output on/off setting input pin. 22,23 24,25 21,20 19,18 i a 4,i a 3 i a 2,i a 1 i b 4,i b 3 i b 2,i b 1 output set current digital input pin. 15-stage voltage setting. 28 v cc logic block supply voltage pin truth table phase enable out a out a h l h l l l l h ? h off off set current truth table i a 4 i a 3 i a 2 i a 1 set current iout current ratio 1 1 1 1 11.5/11.5 v ref /3.04re = iout 100 1 1 1 0 11.0/11.5 v ref /3.04re = iout 95.65 1 1 0 1 10.5/11.5 v ref /3.04re = iout 91.30 1 1 0 0 10.0/11.5 v ref /3.04re = iout 86.95 1 0 1 1 9.5/11.5 v ref /3.04re = iout 82.61 1 0 1 0 9.0/11.5 v ref /3.04re = iout 78.26 1 0 0 1 8.5/11.5 v ref /3.04re = iout 73.91 1 0 0 0 8.0/11.5 v ref /3.04re = iout 69.56 0 1 1 1 7.0/11.5 v ref /3.04re = iout 60.87 0 1 1 0 6.0/11.5 v ref /3.04re = iout 52.17 0 1 0 1 5.0/11.5 v ref /3.04re = iout 43.48 0 1 0 0 4.0/11.5 v ref /3.04re = iout 34.78 0 0 1 1 3.0/11.5 v ref /3.04re = iout 26.08 0 0 1 0 2.0/11.5 v ref /3.04re = iout 17.39 * current ratio (%) is the calculated set current value. current decay switching truth table current decay mode decay pin md pin output chopping slow decay h l upper-side chopping fast decay l l dual-side chopping mix decay l 4v to 1.5v input voltage setting cr voltage > md: dual-side chopping cr voltage < md: upper-side chopping
lb1847 no.5982-6/15 sequence table phase a phase b no. i a 4 i a 3 i a 2 i a 1 ena1 pha1 iout i b 4 i b 3i b 2i b 1 ena2 pha2 iout phase 1-2 phase w1-2 phase 2w1-2 phase 4w1-2 0 1 1 1 1 0 0 100% 0 0 1 0 1 * 0% { { { { 1 1 1 1 1 0 0 100 0 0 1 0 0 0 17.39 { 2 1 1 1 1 0 0 100 0 0 1 1 0 0 26.08 { { 3 1 1 1 0 0 0 95.65 0 1 0 0 0 0 34.78 { 4 1 1 0 1 0 0 91.30 0 1 0 1 0 0 43.48 { { { 5 1 1 0 0 0 0 86.95 0 1 1 0 0 0 52.17 { 6 1 0 1 1 0 0 82.61 0 1 1 1 0 0 60.87 { { 7 1 0 1 0 0 0 78.26 1 0 0 0 0 0 69.56 { 8 1 0 0 1 0 0 73.91 1 0 0 1 0 0 73.91 { { { { 9 1 0 0 0 0 0 69.56 1 0 1 0 0 0 78.26 { 10 0 1 1 1 0 0 60.87 1 0 1 1 0 0 82.61 { { 11 0 1 1 0 0 0 52.17 1 1 0 0 0 0 86.95 { 12 0 1 0 1 0 0 43.48 1 1 0 1 0 0 91.30 { { { 13 0 1 0 0 0 0 34.78 1 1 1 0 0 0 95.65 { 14 0 0 1 1 0 0 26.08 1 1 1 1 0 0 100 { { 15 0 0 1 0 0 0 17.39 1 1 1 1 0 0 100 { 16 0 0 0 1 1 * 0 1 1 1 1 0 0 100 { { { { 17 0 0 1 0 0 1 17.39 1 1 1 1 0 0 100 { 18 0 0 1 1 0 1 26.08 1 1 1 1 0 0 100 { { 19 0 1 0 0 0 1 34.78 1 1 1 0 0 0 95.65 { 20 0 1 0 1 0 1 43.48 1 1 0 1 0 0 91.30 { { { 21 0 1 1 0 0 1 52.17 1 1 0 0 0 0 86.95 { 22 0 1 1 1 0 1 60.87 1 0 1 1 0 0 82.61 { { 23 1 0 0 0 0 1 69.56 1 0 1 0 0 0 78.26 { 24 1 0 0 1 0 1 73.91 1 0 0 1 0 0 73.91 { { { { 25 1 0 1 0 0 1 78.26 1 0 0 0 0 0 69.56 { 26 1 0 1 1 0 1 82.61 0 1 1 1 0 0 60.87 { { 27 1 1 0 0 0 1 86.95 0 1 1 0 0 0 52.17 { 28 1 1 0 1 0 1 91.30 0 1 0 1 0 0 43.48 { { { 29 1 1 1 0 0 1 95.65 0 1 0 0 0 0 34.78 { 30 1 1 1 1 0 1 100 0 0 1 1 0 0 26.08 { { 31 1 1 1 1 0 1 100 0 0 1 0 0 0 17.39 { * don?t care note: iout percentage (%) is the calculated setting value.
lb1847 no.5982-7/15 e pin output pin rc pin output pin switching waveform noise spike switch timing chart during pwm drive slow decay (upper-side chopping) decay pin: high md pin: low t n e pin output pin rc pin output pin switching waveform fast decay decay pin: low md pin: low
lb1847 no.5982-8/15 mix decay t m t n t off t on e pin output pin rc pin output pin switching waveform noise spike ton : output on time toff : output off time tm : fast decay time in mix decay mode tn : noise cancelling time mix decay logic setting decay pin : l md pin : 1.5v to 4.0v voltage setting cr voltage and md pin voltage are compared to select dual-side chopping or upper-side chopping. cr voltage > md pin voltage: dual-side chopping cr voltage < md pin voltage: upper-side chopping
lb1847 no.5982-9/15 slow decay current path regenerative current during upper-side transistor switching operation on out a sbd sbd re v bb off out a on constant sensing voltage comparato r regenerative current at upper-side transistor off current path at output on fast decay current path on on off out a sbd sbd re out a v bb off sensing voltage comparato r current path at output on current path at fast decay
lb1847 no.5982-10/15 composite spectrum of set current (1 step normalized to 90 ) 0 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 i out i out phase a phase b sequence no. no. rotation angle composite spectrum 0 0 0 100.0 1 1 9.87 101.5 2 2 14.6 103.35 3 3 20.0 101.78 4 4 25.5 101.12 5 5 30.96 101.4 6 6 36.38 102.61 7 7 41.63 104.7 8 8 45.0 104.5 9 9 48.37 104.7 10 10 53.62 102.61 11 11 59.04 101.4 12 12 64.5 101.12 13 13 70.0 101.78 14 14 75.4 103.35 15 15 80.13 101.5 16 16 90.0 100.0 * rotation angle and composite sp ectrum are calculated values.
lb1847 no.5982-11/15 set current waveform model i out i out phase1 phase2 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 phase a phase b
lb1847 no.5982-12/15 sample application circuit 1 2 3 4 5 6 7 8 9 10 11 12 13 14 v ref 1 cr1 e1 decay1 ouy a ouy a ouy b ouy b decay2 e2 cr2 v ref 2 v bb 28 27 26 25 24 23 22 21 20 19 18 17 16 15 v cc phase1 enable1 i a 1 i a 2 i a 3 i a 4 i b 4 i b 3 i b 2 i b 1 enable2 phase2 gnd lb1847 md sbd sbd sbd sbd ll 0.51 ? 0.51 ? 15k ? 470pf 15k ? 470pf 42v 47 f 1.5v to 4.0v voltage setting 1.5v 5v 10 f logic input notes on usage 1. external diodes because this ic uses upper-side transi stor switching in slow decay mode an d dual-side transistor switching in fast decay mode, it requires external diodes between the out pins and ground, for the regenerative current during switching off. use schottky barrier diodes with low vf. 2. vref pin because the vref pin serves for input of the set current re ference voltage, precautions against noise must be taken. the input voltage range is 0 to 3.0v. 3. gnd pin the ground circuit for this ic must be designed so as to allow for high-current switching. blocks where high current flows must use low-impedance patterns and must be removed from small-signal lines. especially the ground connection for the sensing resistor re at pin e, and the ground connection for the schottky barrier diodes should be in close proximity to the ic ground. the capacitors between v cc and ground, and v bb and ground should be placed close to the v cc and v bb pins, respectively.
lb1847 no.5982-13/15 4. simultaneous on prevention function this ic incorporates a circuit to prevent feed-through curre nt when phase switching. for reference, the output on and off delay times at phase and enable switching are given below. reference data * typical value sink side source side on delay time 1.9 s 2.2 s phase switching (low hi) off deley time 0.8 s 1.8 s on delay time 1.4 s 1.7 s phase switching (hi low) off deley time 0.9 s 1.35 s on delay time 2.15 s 2.75 s enable switching off deley time 1.2 s 5.8 s 5. noise canceler this ic has a noise canceling function to prevent malfunctio n due to noise spikes generated when switching on. the noise cancel time tn is determined by in ternal resistance of the cr pin and the constant of the externally connected cr components. the constant also determines the switching off time. figure 1 shows the internal configuration at the cr pin, and figure 2 the cr pin constant setting range. equation when logic voltage v cc = 5v cr pin voltage e1 = v cc r / (r1 + r2 + r) [v] noise cancel time tn (r1 + r2) c 1n {(e1 ? 1.5) / (e1 ? 4.0)} [s] switching off time toff ?r c 1n (1.5 / e1) [s] internal resistance at cr pin : r1 = 1k ? , r2 = 300 ? (typ.) *the cr constant setting range in figure 2 on page 15 is gi ven for reference. it applies to a switching off time in the range from 8 to 100 s. the switching time can also be made higher than 100 ms. however, a capacitor value of more than several thousand pf will result in longer noise can celing time, which can cause the output current to become higher than the set current. the longer switching off time resu lts in higher output current ripple, causing a drop in average current and rotation efficiency. when keeping the switching off time within 100 ms, it is recommended to stay within the cr constant range shown in figure 2. internal configuration at cr pin c:470pf r2 one-shot multi-blanking time circuit cr pin e1 1k ? r1 300 ? r:15k ? v cc line figure 1
lb1847 no.5982-14/15 switching off time and cr setting range (t off time : approx. 8 to 100 s) 50k 100k 1000 2000 3000 t off time : 30 s t off time : 50 s t off time : 100 s c [pf] r [ ? ]
lb1847 ps no.5982-15/15 sanyo semiconductor co.,ltd. assumes no responsib ility for equipment failures that result from using products at values that exceed, even momentarily, rate d values (such as maximum ra tings, operating condition ranges, or other parameters) listed in products specif ications of any and all sanyo semiconductor co.,ltd. products described or contained herein. sanyo semiconductor co.,ltd. strives to supply high-qual ity high-reliability products, however, any and all semiconductor products fail or malfunction with some probabi lity. it is possible that these probabilistic failures or malfunction could give rise to acci dents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause dam age to other property. when designing equipment, adopt safety measures so that these kinds of accidents or e vents cannot occur. such measures include but are not limited to protective circuits and error prevention c ircuits for safe design, redundant design, and structural design. upon using the technical information or products descri bed herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of sanyo semiconductor co.,ltd. or any third party. sanyo semiconductor co.,ltd. shall not be liable f or any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above. information (including circuit diagr ams and circuit parameters) herein is for example only; it is not guaranteed for volume production. any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. when designing equi pment, refer to the "delivery specification" for the sanyo semiconductor co.,ltd. product that you intend to use. in the event that any or all sanyo semiconductor c o.,ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities conc erned in accordance with the above law. no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any in formation storage or retrieval system, or otherwise, without the prior written consent of sanyo semiconductor co.,ltd. this catalog provides information as of february, 2 008. specifications and information herein are subject to change without notice. i cc -- v cc i bb -- v bb v o (sat) -- i o v o (sat) -- i o 0 50 40 30 20 10 0 5 4 3 2 1 01 2 3 4 5 6 7 0 102030405060 0 0.4 0.8 1.2 1.6 2.0 2.4 0 0.4 0.8 1.2 1.6 2.0 0 2.8 2.0 1.6 1.2 0.4 0.8 2.4 0 2.8 2.0 1.6 1.2 0.4 0.8 2.4 logic supply current, i cc -- ma input logic voltage: i a 1,2,3,4 pha,ena = v cc typ. input logic voltage: i a 1,2,3,4 pha,ena = v cc typ. output on output off logic supply voltage, v cc -- mv output stage supply current voltage, v bb -- v output stage supply current, i bb -- ma output on output off output current, i o -- a output current, i o -- a output saturation voltage, v o (sat) -- v output saturation voltage, v o (sat) -- v sink side [typ.] source side [typ.] 2.4

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